Method and system for providing an analog front end for multiline transmission in communication systems

ABSTRACT

A method and system for providing an analog front end for multiline transmission in communications systems are described. A transceiver circuit ( 1100 ) is configured to reduce line noise by providing a coupled transmitter ( 1106 ), receiver ( 1106 ), prebalance circuit ( 1110 ), and transformer ( 1220 ) further coupled to a communication line ( 1264 ) external to the transceiver circuit. A hybrid (HY) input stage ( 1204 ) coupled to the prebalance circuit provides high frequency compensation by including a first high pass circuit coupled to the HY stage inputs, wherein the high pass circuit includes two parallel passes, each with a capacitor (C 1 ,C 5 ) in series with a resistor (R 9 ,R 10 ). A receiver input stage (RX) (RX) ( 1206 ) further coupled to the prebalance circuit provides low frequency compensation by including a second high pass circuit coupled to the RX stage inputs, wherein the high pass circuit includes two parallel passes, one with a capacitor (C 3 ) and one with a capacitor (C 7 ) in series with a resistor (R 13 ). Lastly, a summing junction ( 1208 ) coupled to the HY stage ( 1204 ) and RX stage ( 1206 ) subtracts the HY stage output from the RX stage output providing a filtered incoming analog signal for post processing.

This application is a U.S. National Stage application of InternationalPatent Application No. PCT/US03/18127, filed on Jun. 6, 2003, whichclaims the benefit of the filing date of the following Provisional U.S.patent applications:

A Method and System for Multiline Transmission in a communicationSystem, U.S. Provisional application Ser. No. 60/387,303, filed on Jun.7, 2002;

A Method and System for Multiline Transmission in a CommunicationsSystem, U.S. Provisional Application Ser. No. 60/398,860, filed on Jul.25, 2002;

An Analog Front End (AFE) Circuit that Provides Echo Rejection inCommunications Systems, U.S. Provisional Application Ser. No.60/387,098, filed on Jun. 7, 2002; and

Vectoring Techniques for Multi-Line Communication Systems, U.S.Provisional Application Ser. No. 60/403,874, filed on Aug. 16, 2002.

FIELD OF THE INVENTION

The present invention relates generally to communication systems and, inparticular to, multiple line transmission in communication systems.

BACKGROUND OF THE INVENTION

Copper infrastructure in the access network is ubiquitous and has servedour voice communication needs well for over a century. As dataconnectivity needs have grown in the last twenty years, severaltechnologies have been introduced to exploit this existing coppernetwork and expand its usefulness. These include narrow-band modems,various versions of DSL, ISDN, DDS and T1/E1 technologies.

The Internet era has introduced new demands on the access network.Bandwidth demand is growing at 25% or more per year for the averageenterprise. But this demand is constrained by the “service gap”—the voidin services and pricing between T1 and T3 service. Creative solutionsthat address this gap in a cost-effective way can increase penetration(total lines in service), margins, and revenue.

T1/E1 service can now be delivered through a single copper pair using anHDSL2 or G.shdsl modem. Data services at similar or higher speeds can bedelivered using ADSL. Newer versions of this technology, such as VDSL,offer speeds of more than 50 Mb/s when operating in an asymmetrical mode(more bandwidth in one direction than in the other). This is remarkable,given the fact that the copper plant was originally designed having onlyvoice services in mind.

The difficulty has been in delivering high symmetrical speeds to all, oreven the majority of customers, in a cost-effective manner. For example,at 10 Mb/s or greater speeds, VDSL has significant reach limitations andcan only serve a small percentage of the customer base. Before it can bewidely adopted, a major and costly re-engineering of the outside plantenvironment is needed to reduce the average loop length.

The vast majority of customers lie within the Customer Service Area(CSA), defined as 12,000 feet of 24AWG cable or 9,000 feet of 26AWGcable. At this range, symmetric 1.5-2.0 Mb/s service is close to thehighest bit rate service that a single copper pair can deliver reliably.For speeds greater than this, fiber-based services are most commonlydeployed today.

Unfortunately, fiber is not ubiquitous in the access network. Currentestimates are that less than 7% of all businesses can be reached byfiber. This is expected to increase to just over 10% by 2006. Recentannouncements of expansion of the fiber network by US telecommunicationscarriers talk about bringing fiber to an additional 1 million UScustomers per year for the next several years, which represents about0.7% of the total customer base per year.

Construction of new fiber in the access network is typically focused onhigh-density environments such as multi-tenant office buildings in largecities. But in the Internet era, the demand for high-speed connectivityis widespread geographically.

Fiber is expensive to deploy. Construction costs can be significant ascan the cost of the equipment itself. Customers located “off net” oftencannot justify the up-front construction costs of fiber, not to mentionthe dramatically higher monthly charges for fiber-based service.

This has created the “service gap”. From an enterprise perspective, thejump from traditional copper to fiber-based service is a large one. Ascustomer demand for bandwidth continues to grow, this service gap willbecome increasingly apparent and problematic.

There are many limitations of the copper loop plant as a communicationsmedium. Copper twisted pairs are usually of small gauge, resulting insignificant signal power reduction over long distances. Despite thisattenuation, however, the capacity of a copper twisted pair at CSA rangewould be well above typical T1 rates if interference and noise could besuppressed. Unfortunately, copper pairs are typically not shielded andincur substantial ingress noise and interference from other lines. Thisis known as crosstalk.

Often, just a single service activated in the same binder can result ina 50% reduction in the capacity of a copper pair compared to the casewhere no other services are present in the binder. Similarly, ingressnoise from RF sources, radio stations, electric motors, etc., can resultin significant performance degradation for the lines in the affectedbinder. The present invention significantly mitigates those limitingfactors and provides dramatic bitrate improvements through the use ofphysical-layer coordination, commonly referred to as “vectoring”.

Existing approaches to multiline transmission utilize “bonding” ofmultiple copper pairs. “Bonding” refers to the combination of multiplecopper pairs at the digital layer. In this approach, the incomingdatastream is partitioned at the transmitter end into multipledatastreams, each of which is transmitted over one of the individualcopper pairs without regard to the other copper pairs. Then, thesemultiple datastreams are reassembled at the receiver end into a singledatastream. The operations of partitioning and reassembling thedatastream have the undesirable side effect of adding latency to thetransmission. Moreover, since the physical layer of the individualcopper pairs is left unchanged, the total bitrate is less than or equalto the sum of the bitrates of the individual pairs.

Crosstalk in a multiline system takes two distinct forms, which areaddressed by different techniques. Crosstalk originating from themultiline system's own transmitters is referred to as “in-domain”crosstalk, while crosstalk originating from other sources is referred toas “out-of-domain” crosstalk. Besides crosstalk, multiline systemssuffer from spectral leakage, poor time domain equalizer (TEQ)performance, poor windowing, and poor analog front end (AFE) designs.

SUMMARY OF THE INVENTION

A method and system for providing an analog front end for multilinetransmission in communications systems are described. A transceivercircuit is configured to reduce line noise by providing a coupledtransmitter, receiver, prebalance circuit, and transformer furthercoupled to a communication line external to the transceiver circuit. Ahybrid (HY) input stage coupled to the prebalance circuit provides highfrequency compensation by including a first high pass circuit coupled tothe HY stage inputs, wherein the high pass circuit includes two parallelpasses, each with a capacitor in series with a resistor. A receiverinput stage (RX) further coupled to the prebalance circuit provides lowfrequency compensation by including a second high pass circuit coupledto the RX stage inputs, wherein the high pass circuit includes twoparallel passes, one with a capacitor and one with a capacitor in serieswith a resistor. Lastly, a summing junction coupled to the HY stage andRX stage subtracts the HY stage output from the RX stage outputproviding a filtered incoming analog signal for post processing.

BRIEF DESCRIPTION OF THE DRAWINGS

Features and advantages of the prevention invention will be apparent toone skilled in the art in light of the following detailed description inwhich:

FIG. 1 illustrates an exemplary communication system 105 that maybenefit from the present method and system;

FIG. 2 illustrates a communication system in which the present methodand system may be practiced;

FIG. 3 illustrates a bundle of pairs used in communication system, withwhich the present method and system may be practiced;

FIG. 4 illustrates the in-domain and out-of-domain components of thecrosstalk noise in a multiline transmission system deployed in a binderof copper pairs;

FIG. 5 illustrates an exemplary functional block diagram 500 of MIMOprocessing according to one embodiment of the present invention;

FIG. 6 illustrates an exemplary MIMO transmission process 600 once aprocessing architecture is computed according to one embodiment of thepresent invention;

FIG. 7 illustrates a functional block diagram of a window shapingprocess 700 according to one embodiment of the present invention;

FIG. 8 illustrates an exemplary process 800 for window shaping accordingto one embodiment of the present invention;

FIG. 9 illustrates an exemplary block diagram of a DMT system such asthe multiline transmission system of the present invention according toone embodiment of the present invention;

FIG. 10 illustrates an exemplary embodiment of a process for creating asubspace TEQ according to one embodiment of the present invention;

FIG. 11 illustrates one embodiment of a transceiver within a DSL modem;

FIG. 12 is an illustration of one embodiment of the present inventionfor reducing echo in an AFE; and

FIG. 13 illustrates one embodiment of the present invention as executedin an AFE circuit for reducing transmission echo.

DETAILED DESCRIPTION

A method and system for multiline transmission in communications systemsare described. For purposes of discussing and illustrating theinvention, several examples will be given in the context of a wirelinecommunication system, such as DSL. However, one skilled in the art willrecognize and appreciate that interference, for example, crosstalk is aproblem in wired and wireless communications and that the techniquesdisclosed are applicable in these areas as well.

In the following description, for purposes of explanation, numerousspecific details are set forth in order to provide a thoroughunderstanding of the present invention. It will be evident, however, toone skilled in the art that the present invention may be practicedwithout these specific details. In some instances, well-known structuresand devices are shown in block diagram form, rather than in detail, inorder to avoid obscuring the present invention. These embodiments aredescribed in sufficient detail to enable those skilled in the art topractice the invention, and it is to be understood that otherembodiments may be utilized and that logical, mechanical, electrical,and other changes may be made without departing from the scope of thepresent invention.

Some portions of the detailed descriptions that follow are presented interms of algorithms and symbolic representations of operations on databits within a computer memory. These algorithmic descriptions andrepresentations are the means used by those skilled in the dataprocessing arts to most effectively convey the substance of their workto others skilled in the art. An algorithm is here, and generally,conceived to be a self-consistent sequence of acts leading to a desiredresult. The acts are those requiring physical manipulations of physicalquantities. Usually, though not necessarily, these quantities take theform of electrical or magnetic signals capable of being stored,transferred, combined, compared, and otherwise manipulated. It hasproven convenient at times, principally for reasons of common usage, torefer to these signals as bits, values, elements, symbols, characters,terms, numbers, or the like.

It should be borne in mind, however, that all of these and similar termsare to be associated with the appropriate physical quantities and aremerely convenient labels applied to these quantities. Unlessspecifically stated otherwise as apparent from the following discussion,it is appreciated that throughout the description, discussions utilizingterms such as “processing” or “computing” or “calculating” or“determining” or “displaying” or the like, refer to the action andprocesses of a computer system, or similar electronic computing device,that manipulates and transforms data represented as physical(electronic) quantities within the computer system's registers andmemories into other data similarly represented as physical quantitieswithin the computer system memories or registers or other suchinformation storage, transmission or display devices.

The present invention can be implemented by an apparatus for performingthe operations herein. This apparatus may be specially constructed forthe required purposes, or it may comprise a general-purpose computer,selectively activated or reconfigured by a computer program stored inthe computer. Such a computer program may be stored in a computerreadable storage medium, such as, but not limited to, any type of diskincluding floppy disks, optical disks, CD-ROMs, and magnetic-opticaldisks, read-only memories (ROMs), random access memories (RAMs), EPROMs,EEPROMs, magnetic or optical cards, or any type of media suitable forstoring electronic instructions, and each coupled to a computer systembus.

The algorithms and displays presented herein are not inherently relatedto any particular computer or other apparatus. Various general purposesystems may be used with programs in accordance with the teachingsherein, or it may prove convenient to construct more specializedapparatus to perform the required method. For example, any of themethods according to the present invention can be implemented inhard-wired circuitry, by programming a general-purpose processor or byany combination of hardware and software. One of skill in the art willimmediately appreciate that the invention can be practiced with computersystem configurations other than those described below, includinghand-held devices, multiprocessor systems, microprocessor-based orprogrammable consumer electronics, DSP devices, network PCs,minicomputers, mainframe computers, and the like. The invention can alsobe practiced in distributed computing environments where tasks areperformed by remote processing devices that are linked through acommunications network. The required structure for a variety of thesesystems will appear from the description below.

The methods of the invention may be implemented using computer software.If written in a programming language conforming to a recognizedstandard, sequences of instructions designed to implement the methodscan be compiled for execution on a variety of hardware platforms and forinterface to a variety of operating systems. In addition, the presentinvention is not described with reference to any particular programminglanguage. It will be appreciated that a variety of programming languagesmay be used to implement the teachings of the invention as describedherein. Furthermore, it is common in the art to speak of software, inone form or another (e.g., program, procedure, application . . . ), astaking an action or causing a result. Such expressions are merely ashorthand way of saying that execution of the software by a computercauses the processor of the computer to perform an action or produce aresult

It is to be understood that various terms and techniques are used bythose knowledgeable in the art to describe communications, protocols,applications, implementations, mechanisms, etc. One such technique isthe description of an implementation of a technique in terms of analgorithm or mathematical expression. That is, while the technique maybe, for example, implemented as executing code on a computer, theexpression of that technique may be more aptly and succinctly conveyedand communicated as a formula, algorithm, or mathematical expression.Thus, one skilled in the art would recognize a block denoting A+B=C asan additive function whose implementation in hardware and/or softwarewould take two inputs (A and B) and produce a summation output (C).Thus, the use of formula, algorithm, or mathematical expression asdescriptions is to be understood as having a physical embodiment in atleast hardware and/or software (such as a computer system in which thetechniques of the present invention may be practiced as well asimplemented as an embodiment).

A machine-readable medium is understood to include any mechanism forstoring or transmitting information in a form readable by a machine(e.g., a computer). For example, a machine-readable medium includes readonly memory (ROM); random access memory (RAM); magnetic disk storagemedia; optical storage media; flash memory devices; electrical, optical,acoustical or other form of propagated signals (e.g., carrier waves,infrared signals, digital signals, etc.); etc.

Overview of a General Communication Network

The present method and system is applicable to a variety ofcommunication systems, for example: wireline, wireless, cable, andoptical. FIG. 1 illustrates an exemplary communication system 105 thatmay benefit from the present method and system. The backbone network 120is generally accessed by a user through a multitude of accessmultiplexers 130 such as: base stations, DSLAMs (DSL AccessMulitplexers), or switchboards. The access multiplexers 130 communicatewith the network users. The user equipment 140 exchanges userinformation, such as user data and management data, with the accessmultiplexer 130 in a downstream and upstream fashion. The upstream datatransmission is initiated at the user equipment 140 such that the userdata is transmitted from the user equipment 140 to the accessmultiplexer 130. Conversely, the downstream data is transmitted from theaccess multiplexer 130 to the user equipment 140. User equipment 140 mayconsist of various types of receivers that contain modems such as: cablemodems, DSL modems, and wireless modems. In this network access systemthe current method and system may be practiced to identify sources ofinterference in the access channels.

For illustration purposes and in order not to obscure the present methodand system, an example of a communication system that may implement thepresent method and system, in one embodiment, is given in the area ofDSL communication systems. As such, the following discussion, includingFIG. 2, is useful to provide a general overview of the present methodand system and how the method and system interacts with the architectureof the DSL system.

Overview of DSL Example

DSL is to be understood to refer to a variety of Digital Subscriber Line(DSL) standards that, even now, are evolving. Each DSL standard will bereferred to as a DSL service type. At the present time, DSL servicetypes include, but are not limited to, ADSL, SDSL, HDSL, and VDSL(Asymmetrical, Symmetrical, High speed, and Very high speed DSLrespectively).

FIG. 2 illustrates a communication system 200, in which the presentmethod and system may be practiced. A central office 202 has a series ofDSL modems 204-1 through 204-N, including transceivers 214-1 through214-N, connected via twisted pairs 206-1 through 206-N as a bundle 208connected to customers DSL 210-1 through 210-N, including transceivers216-1 through 216-N, which is connected respectively to customer'spremise equipment (CPE) 212, such as a local area network or computer.One skilled in the art recognizes that twisted pair bundle 208 mayexperience crosstalk between the twisted pairs 206-1 through 206-N anddepending upon the services carried by pairs, data rates, and otherfactors, such as proximity of the pairs to each other, etc., there maybe varying and different amounts of crosstalk on pairs.

For example, FIG. 3 illustrates a bundle (also called a binder) 308,having twisted pairs 306-1 through 306-N. Pair 306-1 may be expected toexperience more crosstalk from a pair 306-2 closer to it than moredistant 306-L. Likewise, pair 306-2 located on the perimeter of thebundle 308 may experience different crosstalk than a pair 306-M moretoward the center of the bundle 308. Additionally, if pair 306-1 was theonly DSL service pair and now pair 306-M is placed into DSL service,there may be new crosstalk due to this activation. Also the type of DSLservice (i.e. SDSL, etc.) may have an effect on crosstalk. In general,each DSL service type occupies a band limited frequency region. If pairsin proximity to each other are conveying information in differentfrequency bands, then there may be less crosstalk than if pairs areconveying information in the same frequency band. For purposes ofdiscussion, co-channel is used to describe the physical coupling betweentwo interfering pairs. This coupling may be represented by a lineardynamic system that will also be called a co-channel.

In order to illustrate the present method and system, as mentionedabove, the use in a DSL system will be described and discussed, howeveras also mentioned above, one is to understand that one of ordinary skillin the art will recognize that the techniques presented are not limitedto DSL and may be used in all manner of communication both wired andwireless.

Crosstalk in a Multiline Communication System

The present method and system describes multiline transmissions in acommunication system that deliver fiber-like services by combiningmultiple copper pairs. This method and system enables carriers to offerhigh-rate services to the majority of their customers using theirexisting copper plant infrastructure. The business benefits to thecarriers are significant. High-speed copper-based services can bedelivered for less than half the cost of traditional T3 over fiber,significantly reducing capital expenditures and improving margins. TrueFractional T3 (FT3) service and next-generation Ethernet service as wellas the services targeted by the recent standards efforts by IEEE'sEthernet for the First Mile (EFM) and T1E1.4 Multi-megabit Multi-loopDSL (MMDSL) committees, are enabled and ideally suited for deliveryusing a multiline technology platform. For the enterprise, carrierservices based on this technology can be available broadly and withouthigh non-recurring costs.

The present method and system coordinates the transmission ofsynchronized waveforms across multiple pairs, and jointly processes thereceived signals on all the pairs at the receiver end. This MultipleInput Multiple Output (MIMO) scheme takes advantage of theinterdependencies of signals traveling along adjacent lines to mitigatethe effects of crosstalk, thereby resulting in impressive performancegains compared to existing approaches. FIG. 4 illustrates one embodimentof a binder 400 having multiple lines experiencing crosstalk.

It is possible to mitigate the effect of Near-End Crosstalk (NEXT)originating from in-domain lines 405, because the signals of theinterfering transmitters are known and thus their effect can becancelled from the affected receivers. This cancellation is based onidentifying the precise filter that has to be applied to the interferingtransmitted signal to match the exact opposite of the receivedinterference. The principle is the same as that used for echocancellation in single-pair transceivers, but in this case it involvesadditional complexities associated with a full matrix of crosstalkcancellation filters, from each transmitter to each receiver in a systemwith two lines or more.

When crosstalk originates from out-of-domain lines 410, on the otherhand, the receiver has no access to the interfering transmitter.Therefore, the mitigation of out-of-domain crosstalk signals is morechallenging. Despite its difficulty, addressing out-of-domain crosstalkis essential to achieving higher bitrates in a multiline system. Withoutit, in-domain crosstalk cancellation is of little benefit, because thereis no guarantee that the in-domain component of the interference will bestronger than the out-of-domain component

The present method and system mitigates the out-of-domain component ofthe interference noise by identifying its spectral signature matrixacross multiple lines, and then pre-whitening the received noise signalacross these multiple lines through the application of an appropriatepre-processing matrix to the outgoing signals prior to transmission, andof the corresponding post-processing matrix to the received signalsbefore decoding them.

This joint processing of signals has the effect of trading offSignal-to-Noise Ratios (SNRs) across lines and across frequencies inorder to reach the maximum data carrying capacity of the channel. Ineffect, the interference noise is “pushed” onto a few dimensions of thesignal space of the multiline transmission medium, and the remainingsubspace that is orthogonal to the noise is exploited to carry signalsthat are essentially free of interference, thereby significantlyincreasing the overall capacity of the multiline system.

In addition, the joint processing of signals has the effect ofeliminating the Far-End Crosstalk (FEXT) originating from in-domainlines. This is achieved by identifying the transmission matrix from alltransmitters to all receivers, and using it to jointly process thesignals from each transmitter across all the receivers.

The fact that the aforementioned “clean” subspace is orthogonal to theinterference noise, and therefore not impaired by it, exposes additionalissues that are not present in conventional transceivers. These issuesinvolve spectral leakage effects in frequency-domain-based transmissionschemes, suboptimal Time Equalizer (TEQ) designs, and suboptimal AnalogFront End (AFE) designs. Their detrimental effects are not significantin conventional copper transmission systems, where they are masked bythe much stronger effects of interference noise. However, in the methoddescribed in the present method and system, their effects are dominantin the “clean” subspace, because that subspace is free of interferencenoise. The present method and system describes methods for improvingthese designs and mitigating their detrimental effects on theperformance of the multiline transmission system.

The present method and system discloses coordinated transmission overmultiple copper pairs. The claimed method and system:

-   -   eliminates in-domain FEXT by jointly processing the signals from        each transmitter across all the receivers;    -   cancels in-domain NEXT in overlapping-frequency transmission        schemes by using a matrix of crosstalk cancellation filters;    -   eliminates in-domain NEXT in Frequency-Division Multiplexed        (FDM) transmission schemes by utilizing well-known “Zipper”        techniques, which involve adding a suffix at the end of the        transmitted frame and appropriately synchronizing the        transmitters and receivers on both ends of the multiline system;    -   mitigates out-of-domain NEXT and FEXT by pre-whitening the noise        across the multiple receivers and exploiting the subspace that        is orthogonal to the interference noise;    -   mitigates the effects of spectral leakage from out-of-domain        crosstalk through the use of receiver-only windowing techniques;    -   improves TEQ performance through the use of subspace-based        designs that address additional optimization criteria; and    -   improves AFE performance through the use of a new hybrid        balancing design and systematic optimization techniques.

1. MIMO Processing

The claimed method and system is applicable to both frequency-domaintransmission schemes, such as the Discrete Multi-Tone (DMT) schemedefined in the G.dmt and G.lite standards of the InternationalTelecommunications Union (ITU), and time-domain transmission schemes,such as the 2B1Q scheme defined in the HDSL standard of the AmericanNational Standards Institute (ANSI). The preferred embodiment is withfrequency-domain schemes, because the MIMO processing can be performedmuch more efficiently in the frequency domain, where it reduces to asimple matrix multiplication in each of the independent frequency bins.

To understand the structure of the MIMO processing, examine onefrequency carrier or “tone” in a DMT system. The small frequency bandssurrounding these individual “tones” are called frequency “bins.” FIG. 5illustrates an exemplary functional block diagram 500 of MIMO processingaccording to one embodiment of the present invention. The MIMOprocessing can be performed by a transceiver in any modem of FIG. 2.Referring to the block diagram of FIG. 5, we have:

k denotes the kth DMT symbol;

w(k) 505 is a vector of symbols for a single frequency bin;

x(k) 525 is a vector of signals to be transmitted in a single frequencybin after MIMO transmitter pre-processing;

y(k) 535 is a vector of received signals in a single frequency binbefore MIMO receiver post-processing;

z(k) 545 is a vector of symbols to be decoded in a single frequency binafter MIMO receiver post-processing;

d(k) 515 is the vector of interference signals;

H_(m) 520 is the main channel matrix for a single frequency bin;

H_(d) 530 is the interference matrix for a single frequency bin;

B 510 is the transmitter pre-processing matrix for a single frequencybin; and

A 550 is the receiver post-processing matrix for a single frequency bin.

Assuming that the prefix is long enough and the time equalizer (TEQ) isdesigned well enough that there is no Inter-Block Interference (IBI),that H_(m) is a square full-rank matrix (this is always true if thereare an equal number of transmitters and receivers on independent copperpairs), and that the elements of d(k) 515 are random variables withE[d(i)d^(H)(j)]=R_(d) for i=j and 0 otherwise, implying that theinterference noise is uncorrelated between different symbols; oneskilled in the art will recognize that this is only approximately truein practice, but that this approximation is a very good one for allpractical purposes.

The pair of matrices A 550 and B 510 are computed with the followingproperties:

1. B 510 is Hermitian, so that the transmitted signal power is preservedacross pairs by the pre-processing operation;

2. AH_(m)B=I, so that the symbol vector component of the received signalis the same as the transmitted symbol vector which allows the receivedsignal to be sliced correctly after receiver post-processing; and

3. E[AH_(d)d(i)d^(H)(j)H_(d) ^(H)A^(H)] is diagonal for i=j and 0otherwise.

This means that the covariance matrix of the interference noise as seenby the receiver is diagonal within a symbol and zero across symbols.Furthermore, this in turn means that the uncorrelated nature of theinterference noise is preserved by the MIMO processing. In addition, thenoise at the receiver is uncorrelated between receiver channels whichimplies that the noise at the receiver is pre-whitened by the MIMOprocessing.

The algorithm that solves this problem is as follows:

Step 1: C is computed such that CH_(m)=I.

Step 2: B is computed such that B^(H)CH_(d)R_(d)H_(d) ^(H)C^(H)B isdiagonal and B^(H)B=I.

Step 3: Then A=B^(H)C.

This solution has the following properties:

Property 1 is satisfied by Step 2, which is always feasible.

Property 2 can be verified by substituting the equalities in Step 1 andStep 3 into the expression of the property:AH_(m)B=B^(H)CH_(m)B=B^(H)B=I.

Property 3 is satisfied by Step 2 and Step 3.

The matrix C can be interpreted as a frequency equalizer (FEQ) thatperforms MIMO transmissions across copper pairs, but not acrossfrequency bins. When there is no in-domain FEXT (i.e., when the matrixH_(m) 520 is diagonal), C can be implemented via a collection of SingleInput Single Output (SISO) FEQ filters, with one FEQ filter per copperpair.

The MIMO processing architecture of FIG. 5 uses the pre-processingmatrix B 510 at the transmitter and the post-processing matrix A 550 atthe receiver to coordinate the transmitted and received signals in afashion that preserves the integrity of the transmitted signal w(k) 550,while simultaneously pre-whitening the interference noise to create aset of directions in the symbol vector space, namely a subspace, that isfree of interference noise. In particular, the interference noise afterreceiver post-processing is given by AH_(d)d(k). Property 3 shows thatthis received noise has been diagonalized, which means that the subspacethat is orthogonal to the range space of the interference noise vector,namely the nullspace of the interference noise, now contains some of thechannels of the multiline system. Hence, those channels are now free ofnoise and can carry significantly higher bitrates than the channels thatare orthogonal to the nullspace of the interference noise, and thereforecontinue to be impaired. In other words, the MIMO processing of FIG. 5restricts the effect of the interference noise to the minimum possiblenumber of channels, and therefore is optimal with respect to thecriterion of maximizing the overall capacity of the multilinetransmission system.

FIG. 6 illustrates an exemplary MIMO transmission process 600 once aprocessing architecture is computed according to one embodiment of thepresent invention. Process 600 commences at block 601. At processingblock 610, a MIMO pre-processor within a transmitter converts symbolvectors into an associated signal vector. The signal vector istransmitted over multiple lines in a communication system at processingblock 620. A signal is received that includes the signal vector andinterference signals at processing block 630. At processing block 640, aMIMO post-processor with a receiver convert the received signal vectorinto a received symbol vector. The received symbols are decoded atprocessing block 650. The process completes at block 699.

The channels that are now in the nullspace of the interference noise arein principle affected only by thermal noise, typically assumed to have aconstant power spectral density (PSD) of −140 dBm/Hz. However, in orderto fully exploit this “clean” subspace, it is desirable to deal withseveral other issues that become major sources of performance impairmentin the absence of the dominant interference noise.

2. Receiver Window Shaping

The first of these issues is the “edge-effect” problem that affects allDMT transceivers that use a Fast Fourier Transform (FFT) to convertsignals from the time domain to the frequency domain. In single-linesystems, this problem manifests itself as “spectral noise leakage” frombins where the noise power is high to bins where the noise power is low.A typical example of this problem is the deterioration of DMTperformance in the presence of AM radio-frequency disturbers: eventhough their spectrum is narrow and should thus affect only 2-3 bins, AMdisturber noise “leaks” into many more bins and becomes a very seriousproblem.

These “edge effects” are more detrimental in the case of a multilinesystem, because, in addition to spectral leakage across frequency bins,they cause the disturber noise power to spread across multipletransmission channels. This “spatial noise leakage” reduces thedimension of the nullspace of the interference noise, thereby reducingthe effectiveness of the MIMO processing and the overall capacity of themultiline transmission system.

Edge effects are caused by the fact that the FFT that converts thereceived samples from the time domain to the frequency domain is offinite length: To demodulate a received DMT symbol, a time-domain signalequal in length to the symbol must be processed with an FFT. The shorterthe DMT symbol, the shorter the FFT. The rate at which data can betransmitted through a DMT system is dependent on the Signal to NoiseRatio (SNR) at each frequency. The finite length of the FFT isequivalent to convolving the spectrum of the noise with a Bartlettwindow, which “smears” the noise power across many frequency bins. Thisis not a problem when the noise spectrum is flat, for example with whitenoise. But when the noise spectrum varies greatly with frequency, as isthe case with narrowband AM disturbers, this “smearing” greatly reducesthe SNR of bins where the noise would have been very low if the FFT hadinfinite length. The shorter the FFT, the greater the noise poweramplification in these clean bins, and the greater the reduction of SNRand, thus, total bitrate.

These edge effects can be mitigated through a time-domain processingstage that reduces the impairment caused by the finite-length FFT insingle-line and multiline systems. This stage is added to the receiver,and, in simple terms, combines the last few samples of data in theprefix (just before the DMT symbol begins) with the last few samples ofthe DMT symbol. The way the data is combined is defined through a“shaping function.” The shaping function is constructed to achieve twogoals:

-   -   the transmitted signal is reconstructed perfectly; and    -   the “smearing” of the noise power (as it appears at the output        of the FFT) is minimized.

FIG. 7 illustrates a functional block diagram of a window shapingprocess 700 according to one embodiment of the present invention. A“standard” DMT window is rectangular in shape. FIG. 7 illustrates areceiver window shaping function that shows that it is possible tochange the prefix shape 701 and main shape 705 as long as the followingtwo conditions are satisfied:

-   -   the prefix shape 701 and main shape 705 add up to a rectangle        710; and    -   the length of the equalized main channel 720 and the length of        the prefix shape 730 added together are less than or equal to        the boundary length of the prefix 715.

Under these conditions, the signal strength is invariant with respect tothe prefix shape 701. Since the noise does not have a prefix, however,the noise power is not invariant with respect to the prefix. Toformulate a relevant optimization criterion, the noise covariance matrixis defined for the ith bin of a multiline system to be R^(i). The jthsingular value of this matrix is σ_(j) ^(i). For a multiline system withMIMO processing, the SNR (in dB) in the ith bin of the jth channel isgiven by the expressionSNR _(j) ^(i)=10 log₁₀(p ^(i))−10 log₁₀(σ_(j) ^(i))where p^(i) is the power transmitted in the ith bin of the virtual line.This power is fixed by selecting a spectral template consistent withspectral compatibility standards.

The number of bits that can be transmitted in the ith bin of the jthchannel is proportional to the SNR in dB. To maximize the overallbitrate for the multiline system, we would like to maximize the sum ofthe SNRs over all bins and all virtual lines. Since the powers p^(i) forthe bins are fixed, we can maximize the overall bitrate by minimizingthe double sum:

$\sum\limits_{j = 1}^{N_{lines}}{\sum\limits_{i = 1}^{N_{bins}}{10\mspace{11mu}{\log_{10}( \sigma_{j}^{i} )}}}$

Following extensive experimentation with different disturber scenarios,it was concluded that one prefix shape that produces uniformly highbitrates across a wide variety of conditions is the linear shape 701shown in FIG. 7. In particular, if we allocate n samples to the prefixshape 701, then the values of the shape should be

$\frac{1}{n + 1},\frac{2}{n + 1},\cdots\mspace{11mu},\frac{n}{n + 1}$

The values 0 and 1 are omitted from the above expression, because theyare inherently present in the main shape. This prefix shape achieves thesame edge effect suppression as one with the values 0 and 1 included,but with two more samples allocated to data payload instead of prefixoverhead.

This type of receiver windowing is similar to the windowing described inthe VDSL literature and known as the “Zipper” method. The Zipper methodis very useful for mitigating the spectral leakage effects that generateecho noise in VDSL transceivers services. This method uses not only aprefix at the beginning of the transmitted frame, as in conventional DMTschemes, but also a suffix at the end of the transmitted frame. TheZipper scheme synchronizes the timing of the transmitters at both endsof the communications system, and uses the suffix as a buffer thatallows the corresponding receivers to delay or advance the start of thereceived frame. This shifting of the received frame is done so that, atthe receiver, the echo noise received from the near-end transmitters, aswell as the main signal received from the far-end transmitter, have thecirculant property that guarantees the absence of spectral leakageeffects after processing by the FFT. This implies that there is nospectral leakage in the echo generated from the near-end transmitter,and therefore that noise is completely contained in a differentfrequency band than the band used by the far-end transmitter. As aresult, the echo noise is eliminated in an FDM scheme such as VDSL.

The Zipper scheme utilizes transmitter and receiver windowing, but thewindow shapes described in the literature typically have a raised-cosineshape. The receiver windowing scheme illustrated in FIG. 7 utilizes awindow only at the receiver, with the goal of mitigating spectralleakage not from its own transmitter, as it is for the Zipper scheme,but from other transmitters in the binder. For this goal, extensiveoptimization work has shown that the linear window shape described aboveis more suitable and results in higher performance.

In multiline systems that use an FDM transmission scheme, one can applythe Zipper scheme, as described above, to mitigate the echo from all thenear-end transmitters to all the near-end receivers of the multilinesystem. By adding a suffix at the end of the transmitted frames, andsynchronizing all the transmitters at both ends of the multiline system,it is possible to eliminate the echo not only from each receiver's owntransmitter, but from all other near-end transmitters as well, sincethey all transmit synchronized frames that will have the circulantproperty when received by each receiver.

FIG. 8 illustrates an exemplary process 800 for window shaping accordingto one embodiment of the present invention. Process 800 commences atblock 801. At processing block 810, a last portion of a prefix symbol isextracted from a standard prefix. The extracted prefix is shaped asdescribed above with a prefix shaping window at processing block 820. Atprocessing block 830, a last portion of a DMT symbol is shaped with aDMT window. At processing block 840, the shaped DMT and prefix symbolsare combined to generated a full rectangular symbol with a length lessthan or equal to the boundary prefix length.

3. Subspace TEQ Design

The second issue that needs to be addressed in a multiline transmissionsystem is the design of a time domain equalizer (TEQ). FIG. 9illustrates an exemplary block diagram of a DMT system 900 such as themultiline transmission system of the present invention according to oneembodiment of the present invention. System 900 includes an FEQ 910 perpair of transmission lines as described above. Time domain equalizationtechniques are ubiquitous in current DMT systems such as system 900. Thepurpose of the TEQ 905 is to shorten the otherwise much longer physicalchannel 910 to within the prefix length such that inter-symbolinterference (ISI) can be eliminated. The most common approach toequalization is the minimum mean square error (MMSE) criterion, which isonly optimal for single carrier systems. In a multi-carrier system,minimizing the overall mean square error does not necessarily maximizethe bitrate. Thus, the performance of MMSE TEQ is far from satisfactory.

Different optimization criteria have been explored to improve TEQperformance, including the minimum ISI (MinISI) solution, the maximumshortening SNR (MSSNR) method, the maximum geometrical SNR (MGSNR)approach, etc. Compared with the MMSE result, these equalizers increasethe overall transmission bitrate. Unfortunately, none of these methodsis optimal: certain approximations are used in each criterion tosimplify the optimization procedure. Even the MGSNR approach, althoughoptimal in theory, is suboptimal in implementation as in practice it istoo complicated to realize a true MGSNR TEQ. Published comparisonsbetween these time-domain solutions show that both MMSE and MGSNR TEQsintroduce multiple notches in the equalized channel, resulting in agreat loss of bit carrying capacity at the corresponding frequency bins,while MinISI and MSSNR TEQs eliminate those nulls and thus achieve ahigher data rate.

However, the performance of MinISI and MSSNR TEQs varies from onetransmission channel to the next. In the multiline system of the presentmethod and system, these TEQs reduce the number of multiple notchesappearing in the MMSE and MGSNR TEQ designs, but they do not completelyeliminate them. Since the SNR in the neighborhood of those frequencybins with channel notches is lower, the overall bitrate is decreased.This detrimental effect is much more pronounced in the multiline systemof the present method and system, since the SNR of each bin in the“clean” subspace is much higher than in a typical single-line system,and thus the loss of data capacity due to TEQ notches becomes much moresignificant Therefore, it is desirable to design a high performance TEQthat is suitable for multiline systems. One such approach is thefrequency-domain “per tone equalization” (PTEQ), which leads to a veryrobust and effective equalizer design. However, the PTEQ employs acompletely different implementation structure, which requires a greatdeal of on-chip memory, thus increasing the cost of practical theexisting systems.

In one embodiment, the present TEQ design method is based on acombination of a MSSNR criterion and a subspace method. The resultingTEQ 905, called the “subspace” TEQ, shows comparable performance to thatof the optimal PTEQ, but without the increased cost.

Before we develop the idea of the subspace TEQ 905, we briefly introducethe MSSNR design. The MSSNR TEQ and the MinISI TEQ have very similarperformance. Since the former uses the channel information only and isless expensive to implement, the MMSNR criterion is the first step inTEQ 905 design.

The MSSNR TEQ design intends to maximize the energy of the portion ofthe equalized channel impulse response that lies inside a window oflength v+1 taps corresponding to the desired length of the shortenedchannel. At the same time the energy outside this window is constrained.Let v be the prefix length and w be the TEQ response. Given the channelconvolution matrix H, define H_(win) as the portion inside a window andH_(wout) as the portion outside of the same window. Then the in-windowenergy can be expressed as:h_(win) ^(H)h_(win)=w^(H)H_(win) ^(H)H_(win)w=w^(H)Aw,

where A=H_(win) ^(H)H_(win), and the residual ish_(wout) ^(H)h_(wout)=w^(H)H_(wout) ^(H)H_(wout)w=w^(H)Bw,

where B=H_(wout) ^(H)H_(wout). Thus, the MSSNR criterion can beformulated as

$\max\limits_{w}\;{w^{H}\; A\; w}$subject to w^(H)Bw=1.

This is a maximum eigenvalue problem whose solution can be found as:w _(opt)=(√{square root over (B)} ^(H))⁻¹1_(max)

where 1_(max) is the unit length eigenvector associated with the maximumeigenvalue λ_(max) of the composite matrix C which is defined asC=(√{square root over (B)})⁻¹ A(√{square root over (B)} ^(H))⁻¹.

Thus, the maximum eigenvalue of C for different delays is searched for,and the MSSNR TEQ corresponds to the one that has the largest eigenvalueamong all possible delays.

Generally, the matrix B is positive definite, and hence √{square rootover (B)} can be computed via the Cholesky decomposition. However, B ischannel dependent and in some cases it does not satisfy the positivedefiniteness requirement due to numerical inaccuracies. A simple andeffective way to fix this problem is to pre-condition the matrix byadding a small positive term, which is based on the fact that if B isnot positive definite, its negative eigenvalue is usually very close tozero, and thus a small conditioning number will be sufficient to removethe negative eigenvalues from B. This modification leads to B=B+βI,where β>0 assumes a comparatively small value; the modified matrix B isthen used instead of B in the equations above.

The rationale behind the subspace TEQ method originates from thefollowing observation: the maximum eigenvalue of the matrix C associatedwith the optimal delay sometimes is not dominant, which means that thereexist a few eigenvalues, though smaller than the largest one, stillcomparable to the largest one and much larger than the rest. Theseeigenvalues are combined, instead of just selecting the largest one, inorder to find a better TEQ.

The subspace TEQ 905 combines the subspace method with the MSSNR designrule. The resulting TEQ 905 performs a two-step optimization procedure:First, the optimal delay is determined using the MSSNR criterion, and afew dominant eigenvectors of the composite matrix corresponding to thisdelay are obtained. Second, an optimization is performed over thesubspace spanned by these eigenvectors and the optimal TEQ coefficientsare computed.

Let λ_(max,1)> . . . >λ_(max,K) be the K largest eigenvalues of C_(opt),which is the composite matrix computed at the optimal delay. Thecorresponding eigenvectors are denoted as 1_(max,1) . . . 1_(max,K).Rather than using 1_(max)=1_(max,1) in determining the optimal TEQ (inthe sense of maximum shortening SNR) as w_(opt)=(√{square root over(B)}^(H))⁻¹, we may choose to use 1_(max)=α₁1_(max,1)+ . . .+α_(K)1_(max,K) instead, where α₁, . . . α_(K) are positive scalars.Thus,w=α ₁1_(max,1)+ . . . +α_(K)1_(max,K) =LαwhereL=[1_(max,1) . . . 1_(max,K)], α=[α₁ . . . α_(K)]^(T).

So the next step is to optimize w by choosing a “good” α. To achieve ahigher bitrate, the bitrate is maximized over α to obtain the optimalequalizer coefficients:

$\begin{matrix}{{w_{opt} = {L\;\alpha_{opt}}},} & \; & {\alpha_{opt} = {\underset{\alpha}{\arg\mspace{11mu}\max}\mspace{11mu}{f(\alpha)}}}\end{matrix}$where ƒ(α) is a function of α that represents the overall bitrate. Thefunction ƒ(α) is calculated in two steps. First, the SNR in each bin iscalculated as a function of the TEQ impulse response (and hence as afunction of α). Then, the bit-loading formula is applied to thecalculated SNRs.

This cost function is a non-linear one and requires gradient-basedoptimization procedures. Other simpler suboptimal cost functions arealso possible. The proposed framework allows a linear parameterizationof the TEQ impulse response within a subspace that guarantees good ISIproperties and facilitates further optimization within that subspace.

FIG. 10 illustrates an exemplary embodiment of a process 1000 forcreating a subspace TEQ according to one embodiment of the presentinvention. The process 1000 begins at block 1001. At processing block1010, eigenvalues are calculated to maximize an equalized channelimpulse response. As described above, the dominant eigenvalues arecombined at processing block 1020. At processing block 1030, anoptimization over the subspace is performed to calculate the subspaceTEQ coefficients. The process 1000 ends at bock 1099.

4. Improved AFE Design

When the multiline system of the present invention uses an FDMtransmission scheme, application of the Zipper scheme described abovecan eliminate the echo from all the near-end transmitters. On the otherhand, if the multiline system uses an overlapped-spectrum transmissionscheme, in which the upstream and downstream transmitters utilizefrequency bands that overlap at least partially, the echo cancellationtask is shifted to the Analog Front End (AFE) hybrid circuit design. Ofcourse, a good hybrid design is always desirable, even in the case ofFDM transmission.

FIG. 11 illustrates a typical embodiment of a transceiver 1100 within aDSL modem (see FIG. 2). The transceiver 1100 includes a transmitter1102, a receiver 1106, and an AFE 1110. The transmitter 1102 receivesoutgoing signals to be processed by the multiline coding and MIMOprocessing module 1104 and transmitted to the AFE 1110. The AFE 1110transmits the outgoing signal down the bi-directional line 1112 and tothe portion of the echo rejection circuit for filtering incomingsignals. The filtered signal is the combination of the incoming signalfrom the bi-directional line 1112 and the outgoing (transmitted) signalpassed through the echo rejection portion of the AFE 1110. The receiver1106 receives and processes the filtered signal in the MIMO processingand multiline decoding module 1108 for digital transmission toward itsdestination.

In the design of a multiline system, the AFE is critical for reducinganalog echo, which is the rejection of the residual signal from thetransmitter that is present at the receiver. An AFE circuit withimproved echo cancellation requires the ability to model the entirecircuit, including a very accurate model of the transmission line, anunderstanding of the theoretical framework that relates gain and phasein a complex circuit, and an understanding of the conditions under whichparallel transfer functions add to form an equivalent non-minimum phasetransfer function.

The problem of modeling the discrete components in AFE circuitry isfairly straightforward. This is usually in a SPICE environment, however,without a good two-port model of a transmission line, SPICE modeling isuseless. Fortunately, good analytical two-port models of transmissionlines exist, and are expressed in the form:

$\begin{bmatrix}V_{1} \\I_{1}\end{bmatrix} = {\begin{bmatrix}A & B \\C & D\end{bmatrix}\begin{bmatrix}V_{2} \\I_{2}\end{bmatrix}}$

Unfortunately, this format is not readily adapted to SPICE.Nevertheless, with some elementary linear algebraic formulae, this maybe converted to the format:

$\begin{bmatrix}I_{1} \\I_{2}\end{bmatrix} = {\begin{bmatrix}E & F \\G & H\end{bmatrix}\begin{bmatrix}V_{1} \\V_{2}\end{bmatrix}}$

This expression can be implemented as a circuit using standard “E”blocks with SPICE. These blocks accept voltages as inputs and produce asoutputs currents with some inherent gain. Since the resulting variablesE, F, G, and H are frequency dependent, the “E” block must include alookup table that describes the complex gain as a function of frequencywith sufficient resolution. This was done using a MATLAB script thatcompletely transformed the analytical two-port model above into a SPICElibrary script that could be imported into SPICE as an integral circuitblock.

Using an accurate transmission line model to compensate for gain andphase shifts due to complex impedances, it is possible to design an AFEcircuit with high echo rejection. One embodiment of the presentinvention includes a prebalance circuit with a high-pass filter stage atboth the HY and RX inputs and with the signal from the line provided bya separate coil on the transformer (see FIG. 12).

FIG. 12 is an illustration of one embodiment of the present inventionfor reducing echo in an AFE. The circuit 1200 is a fully differentialcircuit including passive components (i.e. resistors, inductors, andcapacitors) and active components (i.e. amplifiers). The data to betransmitted is converted from a digital signal to an analog signal bythe transmit digital-to-analog converter (DAC)/line driver (TX) 1202,dropped over drive resistors R1 1212 and R2 1222 and coupled to the line1264 via transformer 1220. Transformer 1220 includes inductors L1 1214,L2 1218, and L3 1216. The echo is reduced at component 1210 by measuringthe transmitted signal at the hybrid inputs (HY) 1204 and the signalfrom inductor L2 1218 of transformer 1220 at receiver inputs (RX) 1206,and composing the received signal as some linear combination of both atsumming junction 1208. In varying embodiments, the gain at HY 1204 inputmay be adjusted within a small range about unity, while RX 1206 inputhas unity gain. Further, the resistance as seen between the HY 1204inputs and the RX 1206 inputs is controlled by variable resistors R71260 and R8 1262 respectively.

In one embodiment of the present invention, to maintain a minimum phasetransfer function from the TX 1202 outputs to the RX 1206 inputs, thepolarity of the connection between the TX 1202 outputs and RX 1206inputs is reversed in contrast to current designs. Further, varying theratio of resistors R3 1228 to R4 1224 and R5 1230 to R6 1226 maintainsthe appropriate amount of dampening of the transfer function.

In situations where the circuit appears to have a slightly under-dampedroll-up at low frequencies (below the corner frequency of the high-passfilter to the RX 1206 inputs) creating a mismatched in phase at the HY1204 and RX 1206 inputs, one embodiment of the present inventionutilizes a high-pass filter circuit at the RX 1206 inputs. Thishigh-pass filter circuit provides low frequency compensation byincluding two parallel passes where each pass includes two branches. Thefirst pass includes one branch with capacitor C3 1252 and another branchwith capacitor C7 1250 in series with a resistor R13 1248. The secondpass includes one branch with capacitor C4 1254 and the other branchwith capacitor C8 1258 in series with a resistor R14 1256. Theseelements shape the gain slope of the roll-up of the TX 1202 to RX 1206transfer function so that it rises more slowly, ensuring that the phasesat the HY 1204 and RX 1206 inputs are a closer match at low frequencies.

In other situations where the effect of the leakage inductance oftransformer 1220 increases the effective impedance of transformer 1220creating a phase mismatch at the HY 1204 and RX 1206 inputs at highfrequencies (around 350 kHz and above), an embodiment of the presentinvention utilizes a high-pass filter circuit at the HY 1204 inputs.This high-pass filter circuit provides high frequency compensation byincluding two parallel passes where each pass includes two branches. Thefirst pass includes one branch with a capacitor C5 1234 in series with aresistor R9 1232 and another branch with capacitor C1 1238 in serieswith a resistor R10 1236. The second pass includes one branch with acapacitor C2 1242 in series with a resistor R11 1240 and the otherbranch with capacitor C6 1246 in series with a resistor R12 1244. Theseelements shape the gain slope of the TX 1202 to HY 1204 transferfunction so that it rises more slowly, ensuring that the phases at theHY 1204 and RX 1206 inputs are a closer match at high frequencies.

Table 1 illustrates values for the various components of an exemplaryembodiment of the present invention.

TABLE 1 CIRCUIT ELEMENT FIG. 12 R₁, R₂ 2.4 Ω R₃, R₅ 200 Ω R₄, R₆ 50 ΩR₇, R₈ Variable 300-6000 Ω R₉, R₁₂ .1 Ω R₁₀, R₁₁ 60 Ω R₁₃, R₁₄ 4.99 kΩC₁, C₂ 3.3 nF C₃, C₄ 3.9 nF C₅, C₆ 470 pF C₇, C₈ 18 nF L₁ 148 μH L₂ 245μH L₃ 3 mH

FIG. 13 illustrates one embodiment of the present invention as executedin an AFE circuit for reducing transmission echo. An outgoing digitalsignal is converted to an analog signal by the transmit DAC (digital toanalog converter) (step 1302). The line driver TX transmits the outgoinganalog signal to the line out via a transformer and to a high frequencycompensation circuit coupled to the HY inputs (step 1304). The highfrequency compensation circuit is a high pass circuit including twoparallel passes configured to change the TX to RX transfer function suchthat the phases at the HY and RX inputs more closely match at lowfrequencies. The incoming analog signal is received through anothertransformer connected to the line and is further transmitted to the highfrequency compensation circuit coupled to the inputs of the RX inputs(step 1306). The high frequency compensation circuit is a high passcircuit including two parallel passes configured to change the TX to HYtransfer function such that the phases at the HY and RX inputs moreclosely match at high frequencies. The echo signal at the HY output isthen subtracted from the RX output at a summing junction resulting in afiltered incoming analog signal (step 1308).

In the foregoing specification, the invention has been described withreference to specific embodiments. It will, however, be evident thatvarious modifications and changes can be made without departing from thebroader spirit and scope of the invention as set forth in the claims.The specification and drawings are, accordingly, to be regarded in anillustrative rather than a restrictive sense.

1. A method comprising: receiving an echo signal at a transceiver,wherein the transceiver includes an Analog-to-Digital Converter (ADC)and Digital-to-Analog Converter (DAC); and reducing the echo signal withan echo rejecter at an input of the ADC, wherein the echo rejecter hasan analog portion and a digital portion, wherein the transceiverincludes an analog front end (AFE), comprising: a hybrid input stage; aprebalance circuit; the echo rejecter; hybrid inputs; receiver inputs;transmitter outputs; a high-pass filter circuit; and a low-pass filtercircuit.
 2. The method of claim 1, further comprising: minimizing anyloss of ADC resolution with a data signal associated with the echosignal.
 3. The method of claim 1, wherein the echo signal includes atransmitter noise signal.
 4. The method of claim 1, wherein the AFEimplements echo rejection across an entire usable frequency band.
 5. Themethod of claim 3, further comprising: lowering the transmitter noisesignal and removing the echo signal completely with the digital portionof the echo rejecter.
 6. The method of claim 5, further comprising:designing a high-pass filter circuit with a transmission line model; anddesigning a low-pass filter circuit with the transmission line model. 7.The method of claim 5, further comprising: using the transceiver in amultiline communications system, wherein the multiline communicationssystem treats multiple twisted copper pairs as a single multilinecommunications channel.
 8. A system comprising: means for receiving anecho signal at a transceiver, wherein the transceiver includes anAnalog-to-Digital Converter (ADC) and Digital-to-Analog Converter (DAC);and means for reducing the echo signal with an echo rejecter at an inputof the ADC, wherein the echo rejecter has an analog portion and adigital portion, wherein the transceiver includes an analog front end(AFE), comprising: a hybrid input stage; a prebalance circuit; the echorejecter; hybrid inputs; receiver inputs; transmitter outputs; ahigh-pass filter circuit; and a low-pass filter circuit.
 9. The systemof claim 8, further comprising: means for minimizing any loss of ADCresolution with a data signal associated with the echo signal.
 10. Thesystem of claim 8, wherein the echo signal includes a transmitter noisesignal.
 11. The system of claim 8, wherein the AFE implements echorejection across an entire usable frequency band.
 12. The system ofclaim 10, further comprising: means for lowering the transmitter noisesignal and removing the echo signal completely with the digital portionof the echo rejecter.
 13. The system of claim 12, further comprising:means for designing a high-pass filter circuit with a transmission linemodel; and means for designing a low-pass filter circuit with thetransmission line model.
 14. The system of claim 12, further comprising:means for using the transceiver in a multiline communications system,wherein the multiline communications system treats multiple twistedcopper pairs as a single multiline communications channel.